The inventors of the present invention have recognized that resistive random access memory (RRAM) provides several advantages over competing memory technologies. Therefore, it can be particularly advantageous to form an RRAM-based memory device on top of a complementary metal oxide semiconductor (CMOS). However, in order to build an RRAM device on a CMOS framework, the RRAM device typically needs to be constructed in connection with a relatively low-temperature process, which introduces some issues with respect to constructing the RRAM.
A difficulty faced by the inventors, associated with building such an RRAM device is precisely controlling current through the RRAM device when the device is in the on-state. Some of the approaches considered by the inventors have tended to include in the RRAM a positive or p-type semiconductor material that acts as a resistive layer to control the on-state current. This resistive layer could be constructed of silicon or silicon germanium in an amorphous phase. The amorphous phase is sometimes preferred over a polycrystalline phase because electrical breakdown voltage of an amorphous material is higher than that of a polycrystalline material. As such, the inventors have recognized that an amorphous material can hold larger voltages and therefore can provide more reliable RRAM device operation.
Unfortunately, it is very difficult to tune the resistance of an amorphous material due to the relatively low electron mobility associated with such amorphous materials. As a result, it is also very difficult to control the current through the RRAM device.
In light of the above, what is desired are methods and apparatus to control on-state current of a resistive random access memory, without the drawbacks described above.